Prof. Jakub Szefer, Computer Architecture and Security Laboratory, Dept. of Electrical Engineering, Yale University.

The tutorial will be given on April 15th, 2021 (Thursday), at 11am-3pm PT = 2pm-6pm ET.

The tutorial will be given virtually (as part of the ASPLOS onference).

This tutorial aims to teach the participants about different topics in processor architecture and security, and in particular how to secure modern processor architectures. The tutorial will focus especially on threats due to information leakage (side and covert channels) and also transient execution attacks. The tutorial will also touch upon design of secure processor architectures and trusted execution environments (TEEs) and how they are impacted by the information leakage and transient execution attacks. A number of strategies for defense against the various attacks will be presented in the context of the existing, and hypothesized, threats. The tutorial will also cover new research opportunities for furthering the security of processor architectures.

This will be a 4 hour tutorial with additional time at the end for discussion and networking.

The schedule of the tutorial is as follows:

11:00am – 1:00pm PT: Tutorial Part 1: Information leaks in processors and Speculative execution atttacks
1:00pm – 1:12pm PT: Brainstorming and shuffle rooms
1:12pm – 1:15pm PT: Break
1:15pm – 2:30pm PT: Tutorial Part 2: Trusted Execution Environments
2:30pm – 2:42pm PT: Brainstorming and shuffle rooms
2:42pm – 3:00pm PT: Wrap-up and conclusion